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| Commercial | ||
 | 80960 Technical Notes | |
| Big-Endian Programming Using i960® Processors | |
| Converting System Designs from i960® CX Processors to i960® JX Processors | |
| Creating Cacheable Contiguous Memory Partitions on the 80960JX Using Logical Memory Control Registers (LMCONs) | |
| Easy upgrade from the 80960KX to the 80960JX | |
| i960® Embedded Microprocessor Q & A | |
| i960® Thermal Fundamentals | |
| IC960 R3.5 New Feature (-Gds) Simplifies Assignment of Global Data to Memory | |
| Installing The EVA960KB Board In Intel386™ And Intel486™ | |
| Interfacing the Byte-Wide SmartVoltage FlashFile™ Memory Family to the Intel960® Microprocessor Family | |
| JTAG Modification Instructions for the JX Processor Module from Cyclone Microsystems | |
| Possible Erratic Power-up Behavior on the i960® JX Processor Due to Improperly Initialized JTAG TAP Controller | |
| Reduced Power Options for the 80960HA/HD/HT Processor | |
| Synchronizing the 80960CA in Multi-Processor Systems | |
| Upgrading System Designs from i960® KX Processors to i960® JX Processors | |
* Legal Information © 1998 Intel Corporation